1. Technical Field
The present invention relates to a television (TV) signal processing circuit which performs a decoding processing sequentially in macro block (MB) units concerning an HDTV (High Definition Television) broadcasting signal with a high resolution and an SDTV (Standard Definition Television) broadcasting signal with a low resolution.
2. Related Art
Digital TV broadcasting involves HDTV broadcasting with a high resolution and SDTV broadcasting with a low resolution. It is desirable for a television receiver to be able to achieve receiving and display of both types of broadcasting signals. Also, there are demands that the HDTV broadcasting be displayed in SDTV television receivers (i.e. television receivers adapted to the standard quality TV broadcasting and the conventional NTSC and PAL broadcasting), in which case an HDTV signal is reduced for conversion into an SDTV signal.
In TV broadcasting, which is achieved utilizing coded data, data decoding with regard to a received wave is necessary. In MPEG-2 decoding, for example, pipeline processing is often used so as to increase the decoding efficiency per unit time. In order to perform the pipeline processing, however, a large size buffer memory is required between two consecutive processings, causing an increase in the circuit size. (See “LSI for SD (Standard Definition) terrestrial digital television” by Shigeyuki OKADA et al., Sanyo Technical Report, Vol. 36, No. 1, June 2004, pp. 45 to 51, for example)
On the other hand, as a down decoder (that is a decoder for achieving data reduction), which allows display of an HDTV broadcasting signal in a television receiver adapted to the SDTV broadcasting, performs reduction in pixel components and data reduction in units of MB (macro block) by means of Hadamard transform, it appears that in such a down decoder, an amount of buffer required between processings can be reduced compared to the buffer amount required for a normal decoder.
In this case, however, because down decoding of an SDTV broadcasting signal, not an HDTV broadcasting signal, results in noticeably rough images, it is necessary to retain a normal decoder in the circuit as well. This makes it impossible to configure a circuit with a reduced buffer memory size which can be achieved by down decoding as described above.